Now showing items 1-7 of 7

    • Design and fabrication of CSWAP gate based on nano-electromechanical systems 

      Yüksel, M.; Erbil, S. O.; Arı, A. B.; Hanay, M. S. (Springer Verlag, 2016)
      In order to reduce undesired heat dissipation, reversible logic offers a promising solution where the erasure of information can be avoided to overcome the Landauer limit. Among the reversible logic gates, Fredkin (CSWAP) ...
    • Enhanced tunability of V-shaped plasmonic structures using ionic liquid gating and graphene 

      Ozdemir, O.; Aygar, A. M.; Balci, O.; Kocabas, C.; Caglayan, H.; Ozbay, E. (Elsevier Ltd, 2016)
      Graphene is a strong candidate for active optoelectronic devices because of its electrostatically tunable optical response. Current substrate back-gating methods are unable to sustain high fields through graphene unless a ...
    • FPGA implementation of a fault-tolerant application-specific NoC design 

      Yesil, S.; Tosun, S.; Ozturk, O. (Institute of Electrical and Electronics Engineers Inc., 2016)
      Today's integrated circuits are more susceptible to permanent link failures than before as a result of diminishing technology sizes. Even a single link failure can make an entire chip useless. Single link failure problem ...
    • Hardware accelerator design for data centers 

      Yesil, S.; Ozdal, M. M.; Kim, T.; Ayupov, A.; Burns, S.; Ozturk, O. (Institute of Electrical and Electronics Engineers Inc., 2016)
      As the size of available data is increasing, it is becoming inefficient to scale the computational power of traditional systems. To overcome this problem, customized application-specific accelerators are becoming integral ...
    • High performance 3D CMP design with stacked hybrid memory architecture in the dark silicon era using a convex optimization model 

      Onsori, S.; Asad, A.; Raahemifar, K.; Fathy, M. (Institute of Electrical and Electronics Engineers Inc., 2016)
      In this article, we present a convex optimization model to design a stacked hybrid memory system to improve performance and reduce energy consumption of the chip-multiprocessor (CMP). Our convex model optimizes numbers and ...
    • Observation of gate-tunable coherent perfect absorption of terahertz radiation in graphene 

      Kakenov, N.; Balci, O.; Takan, T.; Ozkan, V. A.; Altan, H.; Kocabas, C. (American Chemical Society, 2016)
      We report experimental observation of electrically tunable coherent perfect absorption (CPA) of terahertz (THz) radiation in graphene. We develop a reflection-type tunable THz cavity formed by a large-area graphene layer, ...
    • Reconfigurable hardened latch and flip-flop for FPGAs 

      Ahangari, H.; Alouani, I.; Ozturk, O.; Niar, S. (IEEE Computer Society, 2017)
      In this paper, we propose Joint Latch (JLatch) and Joint Flip-Flop (JFF), two novel reconfigurable structures which bring the reconfigurability of reliability to user latches and flip-flops (FFs) in reconfigurable devices ...