Browsing by Keywords "Embedded chip-multiprocessor (eCMP)"
Now showing items 1-4 of 4
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High performance 3D CMP design with stacked hybrid memory architecture in the dark silicon era using a convex optimization model
(IEEE, 2016-05)In this article, we present a convex optimization model to design a stacked hybrid memory system to improve performance and reduce energy consumption of the chip-multiprocessor (CMP). Our convex model optimizes numbers and ... -
A high-performance hybrid memory architecture for embedded CMPs using a convex optimization model
(IEEE, 2015-11)In this article, we present a convex optimization model to design a stacked hybrid memory system for 3D embedded chip-multiprocessors (eCMP). Our convex model optimizes numbers and placement of SRAM and STT-RAM memories ... -
Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach
(IEEE, 2015-12)Energy consumption becomes the most critical limitation on the performance of nowadays embedded system designs. On-chip memories due to major contribution in overall system energy consumption are always significant issue ... -
OptMem: dark-silicon aware low latency hybrid memory design
(IEEE, 2016-01)In this article, we present a convex optimization model to design a three dimension (3D)stacked hybrid memory system to improve performance in the dark silicon era. Our convex model optimizes numbers and placement of static ...
