Now showing items 1-4 of 4

    • Adaptive prefetching for shared cache based chip multiprocessors 

      Kandemir, M.; Zhang, Y.; Öztürk, Özcan (IEEE, 2009-04)
      Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based CMP, multiple cores compete for the shared on-chip ...
    • Dynamic thread and data mapping for NoC based CMPs 

      Kandemir, M.; Öztürk, Özcan; Muralidhara, S. P. (IEEE, 2009-07)
      Thread mapping and data mapping are two important problems in the context of NoC (network-on-chip) based CMPs (chip multiprocessors). While a compiler can determine suitable mappings for data and threads, such static ...
    • Multicore education through simulation 

      Öztürk, Özcan (IEEE, 2009-07)
      This paper presents the experiences using a commercial full system simulation platform - Simics - in a graduate Chip Multiprocessors class. The Simics platform enables students and researchers to do research on computer ...
    • Process variation aware thread mapping for chip multiprocessors 

      Hong, S.; Narayanan, S. H. K.; Kandemir, M.; Özturk, Özcan (IEEE, 2009-04)
      With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiprocessors (CMPs) for example, it is possible that ...