Now showing items 1-4 of 4

    • Hardware accelerator design for data centers 

      Yeşil, Şerif; Özdal, Muhammet Mustafa; Kim, T.; Ayupov, A.; Burns, S.; Öztürk, Özcan. (IEEE, 2016-11)
      As the size of available data is increasing, it is becoming inefficient to scale the computational power of traditional systems. To overcome this problem, customized application-specific accelerators are becoming integral ...
    • An ILP formulation for application mapping onto Network-on-Chips 

      Tosun, S.; Öztürk, Özcan; Ozen, M. (IEEE, 2009)
      Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems ...
    • Terabits-per-second throughput for polar codes 

      Süral, Altuğ; Sezer, E. Göksu; Ertuğrul, Yiğit; Arıkan, Orhan; Arıkan, Erdal (IEEE, 2019-09)
      By using Majority Logic (MJL) aided Successive Cancellation (SC) decoding algorithm, an architecture and a specific implementation for high throughput polar coding are proposed. SC-MJL algorithm exploits the low complexity ...
    • Using data compression for increasing memory system utilization 

      Ozturk, O.; Kandemir, M.; Irwin, M. J. (Institute of Electrical and Electronics Engineers, 2009-06)
      The memory system presents one of the critical challenges in embedded system design and optimization. This is mainly due to the ever-increasing code complexity of embedded applications and the exponential increase seen in ...