Now showing items 1-8 of 8

    • Application mapping algorithms for mesh-based network-on-chip architectures 

      Tosun, S.; Ozturk, O.; Ozkan, E.; Ozen, M. (Springer New York LLC, 2015-03)
      Due to shrinking technology sizes, more and more processing elements and memory blocks are being integrated on a single die. However, traditional communication infrastructures (e.g., bus or point-to-point) cannot handle ...
    • Enabling network security in HPC systems using heterogeneous CMPs 

      Ozturk, O.; Tosun, S. (Wiley Blackwell, 2014)
      This chapter explores the possibility of using heterogeneous chip multiprocessors (CMPs) for network and system security. It proposes an integer linear programming (ILP)-based methodology to mathematically analyze and ...
    • Energy reduction in 3D NoCs through communication optimization 

      Ozturk, O.; Akturk I.; Kadayif I.; Tosun, S. (Springer Wien, 2015)
      Network-on-Chip (NoC) architectures and three-dimensional (3D) integrated circuits have been introduced as attractive options for overcoming the barriers in interconnect scaling while increasing the number of cores. Combining ...
    • Fault-tolerant irregular topology design method for network-on-chips 

      Tosun, S.; Ajabshir V.B.; Mercanoglu O.; Öztürk, Özcan (IEEE, 2014)
      As the technology sizes of integrated circuits (ICs) scale down rapidly, current transistor densities on chips dramatically increase. While nanometer feature sizes allow denser chip designs in each technology generation, ...
    • Fault-tolerant topology generation method for application-specific network-on-chips 

      Tosun, S.; Ajabshir, V. B.; Mercanoglu, O.; Ozturk, O. (Institute of Electrical and Electronics Engineers, 2015)
      As the technology sizes of integrated circuits (ICs) scale down rapidly, current transistor densities on chips dramatically increase. While nanometer feature sizes allow denser chip designs in each technology generation, ...
    • FPGA implementation of a fault-tolerant application-specific NoC design 

      Yeşil, Şerif; Tosun, S.; Öztürk, Özcan (IEEE, 2016-04)
      Today's integrated circuits are more susceptible to permanent link failures than before as a result of diminishing technology sizes. Even a single link failure can make an entire chip useless. Single link failure problem ...
    • ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs 

      Nalcı, Y.; Kullu, P.; Tosun, S.; Öztürk, Özcan (Springer, 2020-07-01)
      The rapid increase in the number of cores on chips forced the designers to invent new communication methods such as Network-on-Chip (NoC) paradigm. Advances in integrated circuit fabrications even allowed three-dimensional ...
    • An ILP formulation for application mapping onto Network-on-Chips 

      Tosun, S.; Öztürk, Özcan; Ozen, M. (IEEE, 2009)
      Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems ...