Now showing items 21-40 of 46

    • General reuse-centric CNN accelerator 

      Çiçek, Nihat Mert; Ning, L.; Öztürk, Özcan; Shen, X. (IEEE, 2021-03-09)
      This paper introduces the first general reuse-centric accelerator for CNN inferences. Unlike prior work that exploits similarities only across consecutive video frames, general reuse-centric accelerator is able to discover ...
    • Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach 

      Onsori, Salman; Asad, A.; Öztürk, Özcan; Fathy, M. (IEEE, 2015-12)
      Energy consumption becomes the most critical limitation on the performance of nowadays embedded system designs. On-chip memories due to major contribution in overall system energy consumption are always significant issue ...
    • ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs 

      Nalcı, Y.; Kullu, P.; Tosun, S.; Öztürk, Özcan (Springer, 2020-07-01)
      The rapid increase in the number of cores on chips forced the designers to invent new communication methods such as Network-on-Chip (NoC) paradigm. Advances in integrated circuit fabrications even allowed three-dimensional ...
    • An ILP formulation for application mapping onto Network-on-Chips 

      Tosun, S.; Öztürk, Özcan; Ozen, M. (IEEE, 2009)
      Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems ...
    • ILP-based communication reduction for heterogeneous 3D network-on-chips 

      Aktürk, İsmail; Öztürk, Özcan (IEEE, 2013-02-03)
      Network-on-Chip (NoC) architectures and three-dimensional integrated circuits (3D ICs) have been introduced as attractive options for overcoming the barriers in interconnect scaling while increasing the number of cores. ...
    • Implications of non-volatile memory as primary storage for database management systems 

      Mustafa, Naveed Ul; Armejach, A.; Öztürk, Özcan; Cristal, A.; Unsal, O. S. (IEEE, 2017)
      Traditional Database Management System (DBMS) software relies on hard disks for storing relational data. Hard disks are cheap, persistent, and offer huge storage capacities. However, data retrieval latency for hard disks ...
    • Improving multicore system performance through data compression 

      Öztürk, Özcan; Kandemir, M. (Wiley, 2017)
      As applications become more and more complex, it is becoming extremely important to have sufficient compute power on the chip. Multicore and many-core systems have been introduced to address this problem. This chapter ...
    • Instruction-level reliability improvement for embedded systems 

      Tekgül, Hakan; Öztürk, Özcan (IEEE, 2020-09)
      With the increasing number of applications in embedded computing systems, it became indispensable for the system designers to consider multiple objectives including power, performance, and reliability. Among these, reliability ...
    • Multicore education through simulation 

      Öztürk, Özcan (IEEE, 2009-07)
      This paper presents the experiences using a commercial full system simulation platform - Simics - in a graduate Chip Multiprocessors class. The Simics platform enables students and researchers to do research on computer ...
    • A novel heterogeneous approximate multiplier for low power and high performance 

      Alouani, I.; Ahangari, Hamzeh; Öztürk, Özcan; Niar, S. (Institute of Electrical and Electronics Engineers, 2018)
      Approximate computing is a design paradigm considered for a range of applications that can tolerate some loss of accuracy. In fact, the bottleneck in conventional digital design techniques can be eliminated to achieve ...
    • NS-SRAM: neighborhood solidarity SRAM for reliability enhancement of SRAM memories 

      Alouani, I.; Ahangari, Hamzeh; Öztürk, Özcan; Niar, S. (IEEE, 2016-08-09)
      Technology shift and voltage scaling increased the susceptibility of Static Random Access Memories (SRAMs) to errors dramatically. In this paper, we present NS-SRAM, for Neighborhood Solidarity SRAM, a new technique to ...
    • Optimizing local memory allocation and assignment through a decoupled approach 

      Diouf, B.; Öztürk, Özcan; Cohen, A. (Springer, 2010-10)
      Software-controlled local memories (LMs) are widely used to provide fast, scalable, power efficient and predictable access to critical data. While many studies addressed LM management, keeping hot data in the LM continues ...
    • Optimizing shared cache behavior of chip multiprocessors 

      Kandemir, M.; Muralidhara, S. P.; Narayanan, S. H. K.; Zhang, Y.; Öztürk, Özcan (ACM, 2009-12)
      One of the critical problems associated with emerging chip multiprocessors (CMPs) is the management of on-chip shared cache space. Unfortunately, single processor centric data locality optimization schemes may not work ...
    • Peachy parallel assignments (EduPar 2019) 

      Öztürk, Özcan; Glick, B.; Mache, J.; Bunde, D. P. (Institute of Electrical and Electronics Engineers Inc., 2019)
      Peachy Parallel Assignments are a resource for instructors teaching parallel and distributed programming. These are high-quality assignments, previously tested in class, that are readily adoptable. This collection of ...
    • Power‐efficient reliable register file for aggressive‐environment applications 

      Alouani, I.; Ahangari, Hamzeh; Öztürk, Özcan; Niar, S. (Institution of Engineering and Technology, 2020)
      In a context of increasing demands for on‐board data processing, insuring reliability under reduced power budget is a serious design challenge for embedded system manufacturers. Particularly, embedded processors in aggressive ...
    • Reconfigurable hardened latch and flip-flop for FPGAs 

      Ahangari, Hamzeh; Alouani, I.; Öztürk, Özcan; Niar, S. (IEEE, 2017-07)
      In this paper, we propose Joint Latch (JLatch) and Joint Flip-Flop (JFF), two novel reconfigurable structures which bring the reconfigurability of reliability to user latches and flip-flops (FFs) in reconfigurable devices ...
    • Register file reliability enhancement through adjacent narrow-width exploitation 

      Ahangari, Hamzeh; Alouani, I.; Öztürk, Özcan; Niar, S.; Rivenq, A. (IEEE, 2016-04)
      Due to the increasing vulnerability of CMOS circuits, new generations of microprocessors require an inevitable focus on reliability issues. As the Register File (RF) constitutes a critical element within the processor ...
    • Reliability-aware 3D chip multiprocessor design 

      Öztürk, Özcan; Aktürk, İsmail (IEEE, 2012-06)
      Ability to stack separate chips in a single package enables three-dimensional integrated circuits (3D ICs). Heterogeneous 3D ICs provide even better opportunities to reduce the power and increase the performance per unit ...
    • A scratch-pad memory aware dynamic loop scheduling algorithm 

      Öztürk, Özcan; Kandemir, M.; Narayanan, S. H. K. (IEEE, 2008-03)
      Executing array based applications on a chip multiprocessor requires effective loop parallelization techniques. One of the critical issues that need to be tackled by an optimizing compiler in this context is loop scheduling, ...
    • Slicing based code parallelization for minimizing inter-processor communication 

      Kandemir, M.; Zhang, Y.; Muralidhara, S. P.; Öztürk, Özcan; Narayanan, S. H. K. (ACM, 2009-10)
      One of the critical problems in distributed memory multi-core architectures is scalable parallelization that minimizes inter-processor communication. Using the concept of iteration space slicing, this paper presents a new ...