Nayfeh, A.Okyay, Ali KemalEl-Atab, N.Özcan, AyşeAlkış, Sabri2016-02-082016-02-0820141938-5862http://hdl.handle.net/11693/28718Date of Conference: 5-9 October 2014Conference Name: 2014 ECS and SMEQ Joint International Meeting, 2014In this work, a bottom-gate charge trapping memory device with Zinc-Oxide (ZnO) channel and 2-nm Si nanoparticles (Si-NPs) embedded in ZnO charge trapping layer is demonstrated. The active layers of the memory device are deposited by atomic layer deposition (ALD) and the Si-NPs are deposited by spin coating. The Si-NPs memory exhibits a threshold voltage (Vt) shift of 6.3 V at an operating voltage of -10/10 V while 2.6 V Vt shift is obtained without nanoparticles confirming that the Si-NPs act as energy states within the bandgap of the ZnO layer. In addition, a 3.4 V Vt is achieved at a very low operating voltage of -1 V/1 V due to the charging of the Si-NPs through Poole-Frenkel emission mechanism at an electric field across the tunnel oxide E > 0.36 MV/cm. The results highlight a promising technology for future ultra-low power memory devices.EnglishAtomic layer depositionElectric fieldsNanoparticlesThreshold voltageCharge trapping layersCharge trapping memoryLow operating voltageOperating voltagePoole-Frenkel emissionSi nanoparticlesSilicon nanoparticlesZinc oxide (ZnO)Conference Paper10.1149/06417.0045ecst