Soh, H. T.Wilder, K.Atalar, AbdullahQuate, C. F.2019-03-282019-03-281997-064-930813-75-1http://hdl.handle.net/11693/50794Scanning probe lithography (SPL) is an emerging area of research in which the scanning tunneling microscope (STM) or atomic force microscope (AFM) is used to pattern nanometer-scale features. Four factors will dictate the viability of SPL as a patterning technology for the semiconductor industry: 1) resolution, 2) alignment accuracy, 3) reliability, and 4) throughput. We present a new SPL technique-a hybrid between the AFM and STMto address these issues. We demonstrate its capabilities and its compatibility with semiconductor processing by fabricating a pMOSFET with an effective channel length (L,ff) of 100 nm and report the device characteristics.EnglishLogic gatesLithographyResistsMOSFETSurfacesProbesMicroscopyConference Paper10.1109/VLSIT.1997.623732