Onsori, SalmanAsad, Arghavan ARaahemifar, K.Fathy, M.2018-04-122018-04-122016-01http://hdl.handle.net/11693/37686Date of Conference: 10-12 Jan. 2016Conference name: 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)In this article, we present a convex optimization model to design a three dimension (3D)stacked hybrid memory system to improve performance in the dark silicon era. Our convex model optimizes numbers and placement of static random access memory (SRAM) and spin-Transfer torque magnetic random-Access memory(STT-RAM) memories on the memory layer to exploit advantages of both technologies. Power consumption that is the main challenge in the dark silicon era is represented as a main constraint in this work and it is satisfied by the detailed optimization model in order to design a dark silicon aware 3D Chip-Multiprocessor (CMP). Experimental results show that the proposed architecture improves the energy consumption and performanceof the 3D CMPabout 25.8% and 12.9% on averagecompared to the Baseline memory design. © 2016 IEEE.English3D integrationConvex optimizationDark siliconEmbedded chip-multiprocessor (eCMP)Hybrid memory architectureNon-volatile memory (NVM)Convex optimizationData storage equipmentDigital storageEnergy utilizationIntegrated circuit designMagnetic storageMemory architectureMultiprocessing systemsOptimizationSiliconStatic random access storageVLSI circuits3-D integrationDark siliconsEmbedded chipsNon-volatile memoryUncore componentsRandom access storageConference Paper10.1109/VLSI-SATA.2016.7593059