Onsori, SalmanAsad, ArghavanRaahemifar, K.Fathy, M.2018-04-122018-04-122015-11http://hdl.handle.net/11693/37719Date of Conference: 2-5 Nov. 2015Conference name: 2015 International SoC Design Conference (ISOCC)In this article, we present a convex optimization model to design a stacked hybrid memory system for 3D embedded chip-multiprocessors (eCMP). Our convex model optimizes numbers and placement of SRAM and STT-RAM memories on the memory layer, and maps applications/threads on cores in the core layer effectively. The detailed proposed model satisfies the power constraint which is the main challenge of dark-silicon era. Experimental results show that the proposed architecture considerably improves the energy-delay product (EDP) and performance of the 3D eCMP compared to the Baseline memory design. © 2015 IEEE.EnglishConvex-optimizationEmbedded chip-multiprocessor (eCMP)Hybrid memory architectureNon-volatile memory (NVM)Adaptive systemsConvex optimizationData storage equipmentDesignDigital storageMultiprocessing systemsOptimizationProduct designProgrammable logic controllersRandom access storageStatic random access storageConvex modelingEmbedded chipsEnergy delay productMemory designMemory layersNon-volatile memoryPower constraintsProposed architecturesMemory architectureConference Paper10.1109/ISOCC.2015.7401747