Aktürk, İsmailÖztürk, Özcan2016-02-082016-02-082014-06http://hdl.handle.net/11693/27152Date of Conference: 15-15 June, 2014Conference name: MES '14 Proceedings of International Workshop on Manycore Embedded SystemsThe full potential of chip multiprocessors remains unex- ploited due to the thread oblivious memory access sched- ulers used in off-chip main memory controllers. This is especially pronounced in embedded systems due to limita- Tions in memory. We propose an adaptive compute-phase prediction and thread prioritization algorithm for memory access scheduling for embedded chip multiprocessors. The proposed algorithm eficiently categorize threads based on execution characteristics and provides fine-grained priori- Tization that allows to differentiate threads and prioritize their memory access requests accordingly. The threads in compute phase are prioritized among the threads in mem- ory phase. Furthermore, the threads in compute phase are prioritized among themselves based on the potential of mak- ing more progress in their execution. Compared to the prior works First-Ready First-Come First-Serve (FR-FCFS) and Compute-phase Prediction with Writeback-Refresh Overlap (CP-WO), the proposed algorithm reduces the execution time of the generated workloads up to 23.6% and 12.9%, respectively. Copyright 2014 ACM.EnglishComputer architectureEmbedded systemsSchedulingChip multiprocessorEmbedded chipsMain memoryMemory accessMemory access latencyMemory access schedulingOff-chipPrioritizationForecastingAdaptive compute-phase prediction and thread prioritization to mitigate memory access latencyConference Paper10.1145/2613908.2613919