Tosun, S.Öztürk, ÖzcanOzen, M.2016-02-082016-02-082009http://hdl.handle.net/11693/28661Date of Conference: 14-16 Oct. 2009Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems suffer from signal propagation delays, signal integrity, and scalability. Network-on-Chip (NoC) is the biggest step towards the communication bottleneck of System-on-Chip (SoC) architectures. In this paper, we present an Integer Linear Programming (ILP) formulation for application mapping onto mesh based Network-on-Chips to minimize the energy consumption of the system. The proposed method obtains optimal or close to optimal results within the given computation time limit. We also experimentally investigate the impact of the size of the mesh architecture on the application mapping and total communication. ©2009 IEEE.EnglishApplication mappingBus-basedCommunication methodComputation timeEnergy consumptionILP formulationInteger Linear ProgrammingMesh architectureNetwork on chipNetwork-on-chipsOptimal resultsSignal IntegritySignal propagation delaysSystem-on-chip architectureApplication specific integrated circuitsInteger programmingLinearizationMappingMicroprocessor chipsOptimizationProgrammable logic controllersRoutersVLSI circuitsCommunicationAn ILP formulation for application mapping onto Network-on-ChipsConference Paper10.1109/ICAICT.2009.5372524