Turhan, TuncerTekgul, H.Öztürk, Özcan2024-03-072024-03-072023-11-15979-8-3503-8212-9https://hdl.handle.net/11693/114382Conference Name: 2023 IEEE Conference on Dependable and Secure Computing (DSC)Date of Conference: 07-09 November 2023As technology advances, the processors are shrunk in size and manufactured using higher-density transistors, making them cheaper, more power efficient, and more powerful. While this progress is most beneficial to end-users, these advances make processors more vulnerable to outside radiation, causing soft errors, mostly in single-bit flips on data. In applications where a certain margin of error is acceptable, and availability is important, the existing software fault tolerance techniques may not be applied directly because of the unacceptable performance overheads they introduce to the system. We propose a technique that ranks the instructions in terms of their criticality and generates a more reliable source code. This way, we improve reliability and minimize the performance overheads.en-USFault ToleranceReliabilityInstruction criticalityCompilerConference Paper10.1109/DSC61021.2023.10354221979-8-3503-8211-2