Browsing by Subject "Burst assembly"

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    Congestion window-based adaptive burst assembly for TCP traffic in OBS networks
    (Springer, 2010-06-29) Ozsarac, S.; Karasan, E.
    Burst assembly is one of the key factors affecting the TCP performance in optical burst switching (OBS) networks. When the TCP congestion window is small, the fixed-delay burst assembler waits unnecessarily long, which increases the end-to-end delay and thus decreases the TCP goodput. On the other hand, when the TCP congestion window becomes larger, the fixed-delay burst assembler may unnecessarily generate a large number of small-sized bursts, which increases the overhead and decreases the correlation gain, resulting in a reduction in the TCP goodput. In this paper, we propose adaptive burst assembly algorithms that use the congestion window sizes of TCP flows. Using simulations, we show that the usage of the congestion window size in the burst assembly algorithm significantly improves the TCP goodput (by up to 38.4% on the average and by up to 173.89% for individual flows) compared with the timerbased assembly, even when the timer-based assembler uses the optimum assembly period. It is shown through simulations that even when estimated values of the congestion window size, that are obtained via passive measurements, are used, TCP goodput improvements are still close to the results obtained by using exact values of the congestion window.
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    Dynamic threshold-based assembly algorithms for optical burst switching networks subject to burst rate constraints
    (Springer, 2010-04-17) Toksöz, M. A.; Akar, N.
    Control plane load stems from burst control packets which need to be transmitted end-to-end over the control channel and furtherprocessed at core nodes of an optical burst switching (OBS) network for reserving resources in advance for an upcoming burst. Burst assembly algorithms are generally designed without taking into consideration the control plane load they lead to. In this study, we propose traffic-adaptive burst assembly algorithms that attempt to minimize the average burst assembly delay subject to burst rate constraints and hence limit the control plane load. The algorithms we propose are simple to implement and we show using synthetic and real traffic traces that they perform substantially better than the usual timer-based schemes.