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dc.contributor.authorOzturk, O.en_US
dc.contributor.authorKandemir, M.en_US
dc.contributor.authorNarayanan, S. H. K.en_US
dc.date.accessioned2018-04-12T13:51:14Z
dc.date.available2018-04-12T13:51:14Z
dc.date.issued2012en_US
dc.identifier.isbn9780470908754
dc.identifier.urihttp://hdl.handle.net/11693/38227
dc.description.abstractVoltage/frequency scaling andprocessor low-power modes (i.e., processor shut-down) are two important mechanisms usedfor reducing energy consumption in embedded MPSoCs. While a unified scheme that combines these two mechanisms can achieve significant savings in some cases, such an approach is limited by the code parallelization strategy employed. In this paper, we propose a novel, integer linear programming (ILP) based workload clustering strategy across parallel processors, oriented towards maximizing the number of idle processors without impacting original execution times. These idle processors can then be switched to a low power mode to maximize energy savings, whereas the remaining ones can make use ofvoltage/frequency scaling. In order to check whether this approach brings any energy benefits over the pure voltage scaling based, pure processor shut-down based, or a simple unified scheme, we implemented four different approaches and tested them using a set of eight array/loop-intensive embedded applications. Our simulation-based analysis reveals that the proposed ILP based approach (1) is very effective in reducing the energy consumptions of the applications tested and (2) generates much better energy savings than all the alternate schemes tested (including a unified scheme that combines voltage/frequency scaling and processor shutdown).en_US
dc.language.isoEnglishen_US
dc.source.titleEnergy-Efficient Distributed Computing Systemsen_US
dc.relation.isversionofhttp://dx.doi.org/10.1002/9781118342015.ch19en_US
dc.subjectEnergy savings in embedded MPSoC, voltage scaling/processor shutdownen_US
dc.subjectExperimental results using SIMICS simulation platformen_US
dc.subjectLoop-nest-based application parallelization strategyen_US
dc.subjectMPSoCs combine, reducing energy consumption for better resultsen_US
dc.subjectWorkload clustering for energy savings on embedded MPSOCSen_US
dc.titleWorkload clustering for increasing energy savings on embedded MPSOCSen_US
dc.typeBook Chapteren_US
dc.departmentDepartment of Computer Technology and Information Systemsen_US
dc.departmentDepartment of Computer Engineeringen_US
dc.citation.spage157en_US
dc.citation.epage160en_US
dc.identifier.doi10.1002/9781118342015.ch19en_US
dc.publisherJohn Wiley and Sonsen_US


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