A performance enhanced power divider structure
IEEE MTT-S International Microwave Symposium Digest
Institute of Electrical and Electronics Engineers Inc.
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Please cite this item using this persistent URLhttp://hdl.handle.net/11693/27441
We analyze the bandwidth capability of a divider with a series RLC circuit at the isolation arm. Analytical expressions for optimal component values are given. Bandwidth limiting effect of the pad capacitances of the chip resistors is analyzed. These parasitic capacitors are compensated by the proposed structure. Broadband characteristic of the new divider is verified by experimental results. © 2014 IEEE.