Low power UWB transceiver design using dynamic voltage scaling

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Author
Garg, R.
Chunjie, D.
Jinyun, Z.
Gezici, S.
Date
2007
Journal Title
IEEE Wireless Communications and Networking Conference, WCNC
Print ISSN
15253511
Pages
1759 - 1764
Language
English
Type
Conference Paper
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Please cite this item using this persistent URL
http://hdl.handle.net/11693/27078
Abstract
Low power consumption is a critical issue in many UWB systems. In this paper, we investigate the application of dynamic voltage scaling (DVS) and other low power design techniques to a multiband-OFDM UWB transceiver baseband circuit design in order to reduce average power consumption of the chip. Our results show significant power savings over the conventional approach. © 2007 IEEE.
Published as
http://dx.doi.org/10.1109/WCNC.2007.330
Keywords
Dynamic voltage scaling
Low power circuit design
Multiband OFDM
Ultra-wideband
Viterbi decoder
Broadband networks
Electric network analysis
Electric power utilization
Microprocessor chips
Viterbi algorithm
Dynamic voltage scaling
Low power circuit design
Transceivers
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