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dc.contributor.authorAkbudak K.en_US
dc.contributor.authorAykanat, Cevdeten_US
dc.date.accessioned2015-07-28T12:02:37Z
dc.date.available2015-07-28T12:02:37Z
dc.date.issued2014-10-23en_US
dc.identifier.issn1064-8275
dc.identifier.urihttp://hdl.handle.net/11693/12688
dc.description.abstractFFor outer-product-parallel sparse matrix-matrix multiplication (SpGEMM) of the form C=A×B, we propose three hypergraph models that achieve simultaneous partitioning of input and output matrices without any replication of input data. All three hypergraph models perform conformable one-dimensional (1D) columnwise and 1D rowwise partitioning of the input matrices A and B, respectively. The first hypergraph model performs two-dimensional (2D) nonzero-based partitioning of the output matrix, whereas the second and third models perform 1D rowwise and 1D columnwise partitioning of the output matrix, respectively. This partitioning scheme induces a two-phase parallel SpGEMM algorithm, where communication-free local SpGEMM computations constitute the first phase and the multiple single-node-accumulation operations on the local SpGEMM results constitute the second phase. In these models, the two partitioning constraints defined on weights of vertices encode balancing computational loads of processors during the two separate phases of the parallel SpGEMM algorithm. The partitioning objective of minimizing the cutsize defined over the cut nets encodes minimizing the total volume of communication that will occur during the second phase of the parallel SpGEMM algorithm. An MPI-based parallel SpGEMM library is developed to verify the validity of our models in practice. Parallel runs of the library for a wide range of realistic SpGEMM instances on two large-scale parallel systems JUQUEEN (an IBM BlueGene/Q system) and SuperMUC (an Intel-based cluster) show that the proposed hypergraph models attain high speedup values. © 2014 Society for Industrial and Applied Mathematics.en_US
dc.language.isoEnglishen_US
dc.source.titleSIAM Journal on Scientific Computingen_US
dc.relation.isversionofhttp://dx.doi.org/10.1137/13092589Xen_US
dc.subjectMatrix partitioningen_US
dc.subjectParallel computingen_US
dc.subjectSparse matricesen_US
dc.subjectSparse matrix-matrix multiplicationen_US
dc.subjectSpGEMMen_US
dc.subjectHypergraph Partitioningen_US
dc.titleSimultaneous input and output matrix partitioning for outer-product-parallel sparse matrix-matrix multiplicationen_US
dc.typeArticleen_US
dc.departmentDepartment of Computer Engineeringen_US
dc.citation.spageC568en_US
dc.citation.epageC590en_US
dc.citation.volumeNumber36en_US
dc.citation.issueNumber5en_US
dc.identifier.doi10.1137/13092589Xen_US
dc.publisherSociety for Industrial and Applied Mathematicsen_US
dc.contributor.bilkentauthorAykanat, Cevdet


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