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      Simultaneous input and output matrix partitioning for outer-product-parallel sparse matrix-matrix multiplication

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      Author
      Akbudak K.
      Aykanat, Cevdet
      Date
      2014-10-23
      Source Title
      SIAM Journal on Scientific Computing
      Print ISSN
      1064-8275
      Publisher
      Society for Industrial and Applied Mathematics
      Volume
      36
      Issue
      5
      Pages
      C568 - C590
      Language
      English
      Type
      Article
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      105
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      Abstract
      FFor outer-product-parallel sparse matrix-matrix multiplication (SpGEMM) of the form C=A×B, we propose three hypergraph models that achieve simultaneous partitioning of input and output matrices without any replication of input data. All three hypergraph models perform conformable one-dimensional (1D) columnwise and 1D rowwise partitioning of the input matrices A and B, respectively. The first hypergraph model performs two-dimensional (2D) nonzero-based partitioning of the output matrix, whereas the second and third models perform 1D rowwise and 1D columnwise partitioning of the output matrix, respectively. This partitioning scheme induces a two-phase parallel SpGEMM algorithm, where communication-free local SpGEMM computations constitute the first phase and the multiple single-node-accumulation operations on the local SpGEMM results constitute the second phase. In these models, the two partitioning constraints defined on weights of vertices encode balancing computational loads of processors during the two separate phases of the parallel SpGEMM algorithm. The partitioning objective of minimizing the cutsize defined over the cut nets encodes minimizing the total volume of communication that will occur during the second phase of the parallel SpGEMM algorithm. An MPI-based parallel SpGEMM library is developed to verify the validity of our models in practice. Parallel runs of the library for a wide range of realistic SpGEMM instances on two large-scale parallel systems JUQUEEN (an IBM BlueGene/Q system) and SuperMUC (an Intel-based cluster) show that the proposed hypergraph models attain high speedup values. © 2014 Society for Industrial and Applied Mathematics.
      Keywords
      Matrix partitioning
      Parallel computing
      Sparse matrices
      Sparse matrix-matrix multiplication
      SpGEMM
      Hypergraph Partitioning
      Permalink
      http://hdl.handle.net/11693/12688
      Published Version (Please cite this version)
      http://dx.doi.org/10.1137/13092589X
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      • Department of Computer Engineering 1418
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