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A heterogeneous memory organization with minimum energy consumption in 3D chip-multiprocessors
(IEEE, 2016-05)
Main memories play an important role in overall energy consumption of embedded systems. Using conventional memory technologies in future designs in nanoscale era cause a drastic increase in leakage power consumption and ...
High performance 3D CMP design with stacked hybrid memory architecture in the dark silicon era using a convex optimization model
(IEEE, 2016-05)
In this article, we present a convex optimization model to design a stacked hybrid memory system to improve performance and reduce energy consumption of the chip-multiprocessor (CMP). Our convex model optimizes numbers and ...
OptMem: dark-silicon aware low latency hybrid memory design
(IEEE, 2016-01)
In this article, we present a convex optimization model to design a three dimension (3D)stacked hybrid memory system to improve performance in the dark silicon era. Our convex model optimizes numbers and placement of static ...
A high-performance hybrid memory architecture for embedded CMPs using a convex optimization model
(IEEE, 2015-11)
In this article, we present a convex optimization model to design a stacked hybrid memory system for 3D embedded chip-multiprocessors (eCMP). Our convex model optimizes numbers and placement of SRAM and STT-RAM memories ...
Projections onto convex sets (POCS) based optimization by lifting
(IEEE, 2013)
A new optimization technique based on the projections onto convex space (POCS) framework for solving convex and some non-convex optimization problems are presented. The dimension of the minimization problem is lifted by ...