Browsing by Keywords "Three dimensional integrated circuits"
Now showing items 1-2 of 2
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ILP-based communication reduction for heterogeneous 3D network-on-chips
(IEEE, 2013-02-03)Network-on-Chip (NoC) architectures and three-dimensional integrated circuits (3D ICs) have been introduced as attractive options for overcoming the barriers in interconnect scaling while increasing the number of cores. ... -
Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy
(Elsevier BV, 2017)Management of a problem recently known as “dark silicon” is a new challenge in multicore designs. Prior innovative studies have addressed the dark silicon problem in the fields of power-efficient core design. However, ...