Now showing items 1-3 of 3

    • Hardware accelerator design for data centers 

      Yeşil, Şerif; Özdal, Muhammet Mustafa; Kim, T.; Ayupov, A.; Burns, S.; Öztürk, Özcan. (IEEE, 2016-11)
      As the size of available data is increasing, it is becoming inefficient to scale the computational power of traditional systems. To overcome this problem, customized application-specific accelerators are becoming integral ...
    • A high-performance hybrid memory architecture for embedded CMPs using a convex optimization model 

      Onsori, Salman; Asad, Arghavan; Raahemifar, K.; Fathy, M. (IEEE, 2015-11)
      In this article, we present a convex optimization model to design a stacked hybrid memory system for 3D embedded chip-multiprocessors (eCMP). Our convex model optimizes numbers and placement of SRAM and STT-RAM memories ...
    • An ILP formulation for application mapping onto Network-on-Chips 

      Tosun, S.; Öztürk, Özcan; Ozen, M. (IEEE, 2009)
      Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems ...