Browsing by Keywords "Optimizing compilers"
Now showing items 1-3 of 3
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Compiler-directed energy reduction using dynamic voltage scaling and voltage islands for embedded systems
(Institute of Electrical and Electronics Engineers, 2013)Addressing power and energy consumption related issues early in the system design flow ensures good design and minimizes iterations for faster turnaround time. In particular, optimizations at software level, e.g., those ... -
A scratch-pad memory aware dynamic loop scheduling algorithm
(2008)Executing array based applications on a chip multiprocessor requires effective loop parallelization techniques. One of the critical issues that need to be tackled by an optimizing compiler in this context is loop scheduling, ... -
SPM management using markov chain based data access prediction
(2008)Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular accesses like scalar values and array expressions ...
